Xilinx TEMAC Checksum offload programming sample

Programming with Xilinx TEMAC Checksum offload engine was bit complex, since it calculates only TCP and UDP checksum on transmission and gives the raw checksum on reception. So, I just tried to explain the logic behind the TCP/UDP Checksum Off load in Hardware with a sample UDP packet transmission and reception.

For Transmission

Step 1:

In UDP layer, Do not forget to fill Checksum field of UDP header of the packet with zero.
Calculate the Pseudo Checksum and send it to driver.

How to calculate pseudo_csum?

unsigned int pseudo_csum;
unsigned short *iphdr_ptr;
pseudo_csum = *iphdr_ptr ++; /* Source IP Address (First two bytes) */
pseudo_csum += *iphdr_ptr ++; /* Source IP Address (Last two bytes) */
pseudo_csum += *iphdr_ptr ++; /* Destination IP Address (First two bytes) */
pseudo_csum += *iphdr_ptr ++; /* Destination IP Address (Last two bytes) */
pseudo_csum += htons(UDP_PROTOCOL_ID); /* UDP Protocol ID: 0x11 */
pseudo_csum += udp_length; /* UDP Packet Length (Data + Heaader Length) */pseudo_csum = (pseudo_csum & 0xffff) + (pseudo_csum >>16);
pseudo_csum += (pseudo_csum >>16);
return (unsigned short)pseudo_csum;
 Step 2:

Set the Transmit buffer descriptor with these extra settings and transmit.

TransmitBD.APP0 = TransmitBD.APP0 | TX_CSCNTRL;
TransmitBD.APP1 = (TX_CSBEGIN << 16) | TX_CSINSERT;
TransmitBD.APP2 = pseudo_csum;

 TX_CSCNTRL is 0x01
TX_CSBEGIN is 34 for IPv4/UDP. It is starting of UDP Header (Ethernet Header size (14) + IP Header size (20)).
TX_CSINSERT is 40 for IPv4/UDP. It is Checksum field offset (starting of UDP header(34) + Checksum offset (6)).

For Reception

In reception, the hardware checksum offload engine just adds the IP packet data in 16 bits. So, subtract the IP header, subtract the UDP checksum, calculate and add the pseudo header and verify with the checksum in the packet.

unsigned short *ip_data = (unsigned short *)(RecieveBD.Buffer + 14);
unsigned short *udp_hdr = (struct udp_header *)(RecieveBD.Buffer + 14 + 20);
unsigned short packet_csum, hw_csum;
unsigned int temp;

Take the hardware generated checksum and shift 16 bits left.

temp = RecieveBD.APP3 & 0xffff;
temp = temp << 16;

Subtract the first 12 bytes of IP header (except the Source and Destination IP addresses: pseudo header)

for (i = 0; i < 6; i++) {
temp -= ip_data[i];
}

Add the UDP protocol ID(0x11) (pseudo header).

temp += htos(UDP_PROTOCOL_ID);

Subtract the UDP checksum. And keep it for later validation.

packet_csum = udp_hdr->check_sum;
temp -= packet_csum;

Add the UDP packet length (pseudo header).

temp += udp_hdr->length;
temp = (temp & 0xffff) + (temp >> 16);
temp += (temp >>16);

Compare the result checksum (16 bits)

hw_csum = (unsigned short)temp;
if (hw_csum != 0xffff)
hw_csum = ~hw_csum;
if (hw_csum == packet_csum)
Checksum passed;
else
Checksum failed;

Send the result to upper layer. Just follow the algorithm for TCP and IPv6 too. For optimized solution and pseudo code for checksum verification, read the following post:


http://embeddedknowledge.blogspot.com/2011/07/xilinx-temac-checksum-offload.html

If you have any queries write as comments.