Thumb state is an added advantage in ARM to reduce the code size. Infact, ARM has single instruction set. Thumb is short hand 16-bit representation of a subset of those instructions. The processor fetches these 16-bit instructions and expands into 32-bit equivalent. So, ARM and Thumb differs only in how the instructions are fetched and interpreted, not in execution. So, speed is not at all changed. CPU has dedicated hardware within the chip to interpret the Thumb instructions.
ARM (Advanced RISC Machines) |
Thumb ("T" in the core's full name specifies Thumb. Eg: ARM7TDMI) |
Needs more memory than Thumb, since all are RISC 32-bit instructions | Reduced memory consumption with 16-bit insturctions (have some 32-bit instructions too) |
Totally 18 Registers: R1-R12, SP(R13), LR(R14), PC(R15), CPSR, SPSR used in exceptions | Totally 12 Registers: R1-R7, SP, LR, PC, CPSR (These 12 registers have to be used to pass data between ARM and Thumb state) |
T bit = 0 of CPSR represents ARM state | T bit = 1 of CPSR represents Thumb state |
Branch instruction (BX or BLX) to the address with LSB set to 0 enters ARM state. (Eg: BX 0x80000000) | Branch instruction (BX or BLX) to the address with LSB set to 1 enters Thumb state. (Eg: BX 0x80000001) |
When exception occurs, ARM state is entered. | - |
When return from Exception, if T bit of SPSR is set to 0, returns to ARM | When return from Exception, if T bit of SPSR is set to 1, returns to Thumb |
- | No way (instruction) to access status or coprocessor registers |
Load and store instructions of R13 register manipulates stack | Has stack mnemonics PUSH, POP |
- | Advantages: Reduced memory, 16-bit bus can be used without compromising with speed Disadvantages: As above said, No way (instruction) to access status or coprocessor registers. Some functions that can be accomplished in a single ARM instruction can only be simulated with a sequence of Thumb instructions. |
Reference:
http://www.eetimes.com/discussion/other/4024632/Introduction-to-ARM-thumb
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