It is very challenging for an Embedded Software Engineer to initialize a hardware and to bring up the system. Mainly they depend on the vendor provided data or hardware engineer to get the configuration data. Especially, configuring SDRAM controller is kept as black box and they think it is very big and unknown task. Not exactly. Initializing SDRAM controller is very simple if you understand the SDRAM operation. Let us do it here.
SDRAM configuration basics
SDRAM is a chip that is not only memory but it has command parser like FLASH memory where you have to write series of commands to ERASE, LOCK and WRITE block of memory. These commands are just memory writes over the FLASH with specific Address bits set. Similarly, SDRAM commands also specific memory writes over SDRAM with specific address bits set. These command have to be executed for Initialization. Understand that these SDRAM commands are common to all SDRAM chips regardless of the Vendor. Let us see the command sequence later.
But, before writing the commands, we must initialize the SDRAM controller with some basic timing parameters in order to guarantee that those commands are written properly to the SDRAM. Assume you are going to an hospital. Can you directly meet the doctor? No. First you have to register your health insurance card in the reception. Then, wait till your turn comes. Then, consult the doctor for a particular time. Then, come out, get the insurance card back and pay the bill. Like that in SDRAM, for each write and read, the CPU has to set the address, enable some other signals to indicate that it is going to write data, wait for sometime, then place the data and wait for a minimum time for the write to be finished then get back the signals. If you set these delay timings to the SDRAM controller, controller helps the CPU for read/write. These timings vary depend on the SDRAM Chip vendor. So, you have to see the datasheet for these delays and set the corresponding parameters in the controller.
Two common operations have to be performed before and after each read/write. They are 1)Activate 2) Precharge(Deactivate). Assume, if you want to consult more than one doctor in the same hospital, what can you do? No need to register the health insurance card for each doctor. If you register once in the reception, then you can consult the doctors in series and finally you can come out. Like that, once if you activate a single row of memory, if you want to read many columns in the same row, no need to Precharge and Activate again. Instead, Activate a row, read many columns and Precharge before going to another row. So, remember this is the sequence of signals for each read and write.
1) Controller Activates a certain row for access. Waits for sometime.
2) Column address and READ or WRITE command is issued. Waits for Data.
3) If more columns are read in the same row, (2) is repeated. Else goes to (4)
4) Deactivates with Precharge command. Wait for sometime before going to (1)
In the above, I have taught you the basics of SDRAM access and Initialization. Now, let me narrate the general Initialization Sequence.
1) Set the above delay timings in the SDRAM controller by referring the SDRAMchip datasheet.
The SDRAM controller do the job of interacting with SDRAM Chip for reading and writing the data. So, you have to teach the controller about the above time delays for performing reading and writing. Let us see this first as follows.
2) Issue the general command sequence for SDRAM Initialization.
The four Important delay timings you have to teach the controller are as follows:
1) tRCD
Delay needed for Row Activation (Time taken for health insurance registration). In other words, it is the minimum time delay that controller have to wait after activating a row and before going to next step(Column Address Strobe). It is called (RAS to CAS Delay). Delay between Row Address Strobe and Column Address Strobe.
2) tCAS
Delay needed between issuing Column address and READ/WRITE command. (Time taken in waiting for the doctor) It means, once the Column Address is issued(Column Address Strobe), controller has to wait for tCAS seconds, before issuing the next step of READ/WRITE command.
3) tRAS (Row Active Time)
Minimum number of clock cycles to access a certain row of data. Overall time the ROW has to be activated. It is total time required between Activate and before issuing Precharge.
That means tRAS = tRCD + tCAS + (Time Required to wait for Data)
(Total time being in the hospital excluding the time take to get insurance card back. It includes the consulting time)
4)tRP (RAS Precharge)
Delay needed between deactivating the Row and going to next step. Once the Precharge command is issued, the controller has to wait for tPR seconds, before going to next step(like Activating next Row). (Time to get back the health insurance card)
These four delay parameters used to be specified in the SDRAM chip data sheet as "tCAS-tRCD-tRP-tRAS". For example, latency values given as 2.5-3-3-8. Sometimes, tRAS is not specified. In that case, in practice for DDR SDRAM, this should be set to at least tRCD + tCAS + 2. So, first download the user manual for the SDRAM chip. Then, Find the above timing parameters and set the controller with.
If the timing values are in ns(nano seconds), convert them into memory cycles.
number of cycles = (delay in ns)/(1/memory speed)
Let us see the command sequence in the next part of this article`How to Initialize SDRAM`.
One more important parameter is Refresh Cycle. SDRAM needs to be refreshed periodically after particular time interval. This parameter varies depend on the chip and should have been specified in the data-sheet. You may need to convert the refresh interval into number of cycles and initialize the controller. The formula is as follows:
Refresh Cycle = tREFI/(1/memory speed)
For example, when tREFI = 7.8us and memory speed is 300 MHz,
the Refresh Cycle is (tREFI=7.8us)/(1/300e+06) = 2340
Enjoy the Hard times!
Enjoy the Hard times!