Marvell 88E1111S initialization: How To

Initializing 88E1111S was a big problem for me, since I could not get the detailed datasheet/user's manual for the same. Once I got the handle it was a simple matter. So, let me explain the steps. This procedure is for 88E1111S with ID of 0x01410cc (88E1111-BAB1 is written on the chip).

First let me define the addresses of the very essential registers for the initialization.

Registers used

Register	Address
#define MIIM_CONTROL	0x00
#define MIIM_STATUS	0x01
#define MIIM_ANAR	0x04
#define MIIM_GBIT_CONTROL	0x09

The initialization code is as follows:

/* Reset the chip */
write_phy_reg(MIIM_CONTROL, 0x9140);
/* Wait for Reset over */
while(read_phy_reg(MIIM_CONTROL) & 0x8000);
/* Marvel 88E1111S sequence */
write_phy_reg(0x1d, 0x1f);
write_phy_reg(0x1e, 0x200c);
write_phy_reg(0x1d, 0x05);
write_phy_reg(0x1e, 0x0);
write_phy_reg(0x1e, 0x100);
/* Enable the 88e1111 internal RX/TX clock delay */
write_phy_reg(0x14, 0x0cd2);
/* Set the Gigabit control register and
   Autonegotiation Advertisement register */
write_phy_reg(MIIM_GBIT_CONTROL, 0xe00);
write_phy_reg(MIIM_ANAR, 0x1e1);
/* Reset Again */
write_phy_reg(MIIM_CONTROL, 0x9140);

/* Check for the link to come up */
while((status = read_phy_reg(MIIM_CONTROL)) & 0x0004);
/* Now, initialization is over. You can parse the status Register to know the Speed and Duplex */

Ping me if you still have problem.

JLPT Level 1 book with english translation

With English explanation, I got Japanese exam level 1 book にほんご500問 上級from ask publications. Seems to be easy and shortcut way to prepare for Level 1 exam. It also provides problems using practical Japanese with English explanation. So, I feel it is a good book to concentrate on more essential Japanese. But, I don`t recommend this book for Kanji beginners, since it has not been edited with all kanji. The same series provides books for Level 2 and Level 3 and 4 too as にほんご500問 中級 and にほんご500問 初級 respectively. Gambate kudasaine!!

Howto create job

Two embedded engineers had gone abroad for on-site job. After the work was over, both returned to home country. After some time, one of those guys got call from the client company for some extension on his previous work. Even after that work was over, he used to get work often from the client company. The another guy who got bored of being in the parent company asked him how he only get the job frequently. That another guy answered "With bugs, engineers create job for themselves and for their next generation too".

MPC8313e eTSEC checksum offloading: Programming guidelines

Checksum offloading(Checksum generation and verification) with TSEC and eTSEC controllers of MPC85xx and MPC83xx family processors is easy, but no clue if something gone wrong and the checksum is not generated. Just listing the sequence may help you in troubleshooting the problem.

TSEC checksum generation application notes

1) First of all, during initialization, enable IPCSEN and TUCSEN bits of Transmit Control Register (TCTRL). 2) Next, in the buffer pointed by the buffer descriptor, the first 8 bytes must be allocated for the Frame control block (FCB). Fill it by setting the appropriate bits of IP, IP6, TUP, UDP, CIP, CTU and L4OS, L3OS fields. (When filling a normal IP packet subsequent to FCB will have L4OS as 20 and L3OS as 14 respectively.) 3) Fill the packet from the next byte of FCB. 4) Set the Length filed of the buffer descriptor with (Packet data length + 8). (The length of FCB is added to the actual packet data length.) 5) Set TOE bit of the flags field of the Transmit Buffer descriptor and Transmit the packet. 6) Make sure the IP, TCP and UDP checksum fields of your packet data is filled with zero.

TSEC checksum verification application notes

1) First of all, during initialization, enable IPCSEN and TUCSEN and PRSDEP fields of Receive Control Register (RCTRL). 2) The first 8 bytes of the received data is the Frame control block (FCB). First check whether IP, TUP bits are set to make sure the packet has come under IP, IPv6, TCP and UDP category. Then check CIP and CTU whether the checksum has been verified and then the result bits EIP and ETU. (In case of fragmented packets(even they are TCP or UDP), they will not come under TCP, UDP category. Those packets have to be sent to upper layer for checksum verification) 3) Subtract 8 from Received packet length and use the remaining packet.

For further troubleshooting,

1) Check with the latest errata. For example,

http://www.freescale.com/files/32bit/doc/errata/MPC8313ECE.pdf?fpsp=1&WT_TYPE=Errata&WT_VENDOR=FREESCALE&WT_FILE_FORMAT=pdf&WT_ASSET=Documentation

2) Check the packet structure and data with packet capture software/analyzer.

The above application notes is mainly based on MPC8313E. So, please crosscheck any other settings for other processors.