Tuesday, September 08, 2009

MPC8313e eTSEC checksum offloading: Programming guidelines

Checksum offloading(Checksum generation and verification) with TSEC and eTSEC controllers of MPC85xx and MPC83xx family processors is easy, but no clue if something gone wrong and the checksum is not generated. Just listing the sequence may help you in troubleshooting the problem.


TSEC checksum generation application notes

1) First of all, during initialization, enable IPCSEN and TUCSEN bits of Transmit Control Register (TCTRL).

2) Next, in the buffer pointed by the buffer descriptor, the first 8 bytes must be allocated for the Frame control block (FCB). Fill it by setting the appropriate bits of IP, IP6, TUP, UDP, CIP, CTU and L4OS, L3OS fields. (When filling a normal IP packet subsequent to FCB will have L4OS as 20 and L3OS as 14 respectively.)

3) Fill the packet from the next byte of FCB.

4) Set the Length filed of the buffer descriptor with (Packet data length + 8). (The length of FCB is added to the actual packet data length.)

5) Set TOE bit of the flags field of the Transmit Buffer descriptor and Transmit the packet.

6) Make sure the IP, TCP and UDP checksum fields of your packet data is filled with zero.

TSEC checksum verification application notes

1) First of all, during initialization, enable IPCSEN and TUCSEN and PRSDEP fields of Receive Control Register (RCTRL).

2) The first 8 bytes of the received data is the Frame control block (FCB). First check whether IP, TUP bits are set to make sure the packet has come under IP, IPv6, TCP and UDP category. Then check CIP and CTU whether the checksum has been verified and then the result bits EIP and ETU. (In case of fragmented packets(even they are TCP or UDP), they will not come under TCP, UDP category. Those packets have to be sent to upper layer for checksum verification)

3) Subtract 8 from Received packet length and use the remaining packet.


For further troubleshooting,

1) Check with the latest errata. For example,

http://www.freescale.com/files/32bit/doc/errata/MPC8313ECE.pdf?fpsp=1&WT_TYPE=Errata&WT_VENDOR=FREESCALE&WT_FILE_FORMAT=pdf&WT_ASSET=Documentation

2) Check the packet structure and data with packet capture software/analyzer.

The above application notes is mainly based on MPC8313E. So, please crosscheck any other settings for other processors.

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